Anyways, I was helping to look for VLSI Design Engineer positions (if you know any, please leave a comment) for him and came across a post from Intel. Companies used to be pretty vague about their visa policies and took it on a case-by-case basis, or restricted visas only to engineers. Well Intel certainly leaves nothing open to interpretation. Check this out:
Intel hires qualified candidates who are authorized to work in the U.S.--
that is, authorized to work without restriction as to a particular employer.
This includes U.S. citizens or nationals, U.S. legal permanent residents,
temporary residents granted legalization under the Immigration Reform and
Control Act of 1986, asylees, and refugees. For foreign nationals who do not
fall in one of the above categories, we limit our hiring of persons
requiring visa sponsorship or individuals currently on a non-immigrant
visa (e.g., H-1, J-1, L-1, F-1, B-1, TN) to candidates at the MS and PhD
levels (or those who have equivalent work experience) who are applying
for positions for which there is a demonstrated shortage of qualified
U.S. candidates
Pretty detailed huh? In any case, I'm going to do a plug here for my cousin. Here's a quick copy and paste from his resume. Please let me know of jobs that suit him. He's got 4+ years experience and, no, I haven't a clue what any of this means. I'm just happy to have abandoned the tech industry altogether:
· Successful experience in RTL design, validation, and methodology including use of Verilog HDL, VCS, Virsim, Signalscan, Perl, SPARC assembly language, LEDA, Verplex
· Extensive experience with silicon lab bringup and debug including use of Lecroy and Tektronix oscilloscopes, logic analyzers, DMM
· Functional knowledge of digital interfaces: Serial I/O modules (UART, I2C, SPI, IR), IEEE JTAG standard 1149.1, SDR and DDR SDRAM
· Experience in a broad range of project activities working closely with other groups' engineers for lab bringup systems issues, ATE test vector program, software and customer applications support of hardware features, mixed-signal issues, DFT, as well as working with EDA vendors
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